1. Field of the Invention and Related Art Statement
The present invention generally relates to a method of producing an insulating film for use as an interlayer-insulating film provided between a semiconductor substrate and a metal layer or between upper and lower metal layers of a semiconductor integrated circuit, and more particularly to a method of producing an insulating film consisting of an organic silane-O.sub.3 CVD film.
Nowadays the so-called VLSI (Very Large Scale Integrated circuit) has been manufactured at a high integration and the integration density has become higher and higher, so that the manufacture of the semiconductor device has required a sub-micron process. In accordance with the progress of the sub-micron process, a surface of the semiconductor device is liable to have large undulation. Depressions and protrusions formed in the surface of the semiconductor device have posed serious restriction upon the manufacture of the semiconductor device. Therefore, it has been earnestly required to improve the technique for flattening the surface of the semiconductor substrate.
An interlayer-insulating film of the sub-micron device must have such a property that a space in the order of sub-microns can be attained and a high flatness can be achieved even on the undulation having a large aspect ratio.
In Japanese Patent Laid-open Publication Kokai Sho 61-77695, there is disclosed a method of producing a silicon oxide interlayer-insulating film by the atmospheric pressure CVD using organic silane-O.sub.3 gas. In this Publication, TEOS (tetra ethoxy silane) is used as the organic silicate material.
In the known atmospheric pressure CVD method using organic silane-ozone gas, there are some problems that the film deposition rate is low, there is formed a rather large overhung, and the film forming temperature is rather high. For instance, the deposition rate in the known atmospheric pressure CVD method is about 500 to 700 .ANG. per minute at a temperature of 400.degree. to 500.degree. C., so that it takes 6 to 8 hours for forming interlayer-insulating films having a thickness of 1 .mu.m on twenty five wafers. Further, since the flatness of the insulating film is poor, the semiconductor wafer must be heated at a higher temperature after the formation of the insulating film, and this might deteriorate characteristics of the semiconductor devices.